Abstract
In this chapter, we mostly discussed 2X oversampling digital CDRs, which required multiple high-frequency clock phases for data and edge sampling. In contrast, baud-rate CDRs employ a single clock phase for data and clock recovery, thereby reducing the power consumed in multiphase clock generation and distribution circuits. Interested readers can read more about baud-rate CDRs, their benefits and drawbacks.
| Original language | English (US) |
|---|---|
| Title of host publication | Phase-Locked Frequency Generation and Clocking |
| Publisher | Institution of Engineering and Technology |
| Pages | 495-524 |
| Number of pages | 30 |
| ISBN (Electronic) | 9781785618857 |
| DOIs | |
| State | Published - Jan 1 2020 |
Keywords
- Clock and data recovery circuits
- Clocks
- Digital circuits
ASJC Scopus subject areas
- General Engineering