Deuterium post-metal annealing of MOSFET's for improved hot carrier reliability

I. C. Kizilyalli, J. W. Lyding, K. Hess

Research output: Contribution to journalArticlepeer-review


Low-temperature post-metallization anneals in hydrogen ambients are critical to CMOS fabrication technologies in reducing Si/SiO2. interface trap charge densities by hydrogen passivation. In this letter we show that the hot carrier reliability (lifetime) of NMOS transistors can be increased by an order of magnitude when wafers are annealed in a deuterium ambient. This phenomenon can be understood as a kinetic isotope effect. The chemical reaction rates involving the heavier isotopes are reduced, and consequently, under hot electron stress, bonds to deuterium are more difficult to break than bonds to protium (H). However, the static chemical bonding (i.e., binding energies and excited states) is evidently the same for both hydrogen and deuterium. We measure identical transistor function after hydrogen and deuterium treatment before hot electron dynamics and resultant damage. Therefore, deuterium and hydrogen post-metal anneal processes are compatible with each other in semiconductor manufacturing. SIMS analysis proves that at typical anneal temperatures (400-450 °C), deuterium diffuses rapidly through the interlevel oxides and accumulates at Si/SiO2 interfaces. Transistor speed versus reliability trade-off in CMOS device design is discussed in light of the findings of this study.

Original languageEnglish (US)
Pages (from-to)81-83
Number of pages3
JournalIEEE Electron Device Letters
Issue number3
StatePublished - Mar 1997

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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