TY - GEN
T1 - Designing a 2048-Chiplet, 14336-Core Waferscale Processor
AU - Pal, Saptadeep
AU - Liu, Jingyang
AU - Alam, Irina
AU - Cebry, Nicholas
AU - Suhail, Haris
AU - Bu, Shi
AU - Iyer, Subramanian S.
AU - Pamarti, Sudhakar
AU - Kumar, Rakesh
AU - Gupta, Puneet
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021/12/5
Y1 - 2021/12/5
N2 - Waferscale processor systems can provide the large number of cores, and memory bandwidth required by today's highly parallel workloads. One approach to building waferscale systems is to use a chiplet-based architecture where pre-tested chiplets are integrated on a passive silicon-interconnect wafer. This technology allows heterogeneous integration and can provide significant performance and cost benefits. However, designing such a system has several challenges such as power delivery, clock distribution, waferscale-network design, design for testability and fault-tolerance. In this work, we discuss these challenges and the solutions we employed to design a 2048-chiplet, 14,336-core waferscale processor system.
AB - Waferscale processor systems can provide the large number of cores, and memory bandwidth required by today's highly parallel workloads. One approach to building waferscale systems is to use a chiplet-based architecture where pre-tested chiplets are integrated on a passive silicon-interconnect wafer. This technology allows heterogeneous integration and can provide significant performance and cost benefits. However, designing such a system has several challenges such as power delivery, clock distribution, waferscale-network design, design for testability and fault-tolerance. In this work, we discuss these challenges and the solutions we employed to design a 2048-chiplet, 14,336-core waferscale processor system.
KW - Chiplet Assembly
KW - Silicon Interconnect Fabric
KW - Waferscale Processors
UR - http://www.scopus.com/inward/record.url?scp=85119437037&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85119437037&partnerID=8YFLogxK
U2 - 10.1109/DAC18074.2021.9586194
DO - 10.1109/DAC18074.2021.9586194
M3 - Conference contribution
AN - SCOPUS:85119437037
T3 - Proceedings - Design Automation Conference
SP - 1183
EP - 1188
BT - 2021 58th ACM/IEEE Design Automation Conference, DAC 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 58th ACM/IEEE Design Automation Conference, DAC 2021
Y2 - 5 December 2021 through 9 December 2021
ER -