Designer-driven topology optimization for pipelined analog to digital converters

Yu Tsun Chien, Dong Chen, Jea Hong Lou, Gin Kou Ma, Rob A. Rutenbar, Tamal Mukherjee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper suggests a practical "hybrid" synthesis methodology which integrates designer-derived analytical models for system-level description with simulation-based models at the circuit level. We show how to optimize stage-resolution to minimize the power in a pipelined ADC. Exploration (via detailed synthesis) of several ADC configurations is used to show that a 4-3-2... resolution distribution uses the least power for a 13-bit 40 MSPS converter in a 0.25 μm CMOS process.

Original languageEnglish (US)
Title of host publicationProceedings - Design, Automation and Test in Europe, DATE '05
Pages279-281
Number of pages3
DOIs
StatePublished - 2005
EventDesign, Automation and Test in Europe, DATE '05 - Munich, Germany
Duration: Mar 7 2005Mar 11 2005

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE '05
VolumeI
ISSN (Print)1530-1591

Other

OtherDesign, Automation and Test in Europe, DATE '05
CountryGermany
CityMunich
Period3/7/053/11/05

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Chien, Y. T., Chen, D., Lou, J. H., Ma, G. K., Rutenbar, R. A., & Mukherjee, T. (2005). Designer-driven topology optimization for pipelined analog to digital converters. In Proceedings - Design, Automation and Test in Europe, DATE '05 (pp. 279-281). [1395571] (Proceedings -Design, Automation and Test in Europe, DATE '05; Vol. I). https://doi.org/10.1109/DATE.2005.119