Design verification of power electronics systems subject to bounded uncertain inputs

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A method for design verification of power electronics systems is proposed. In this method, the system is described by a linear switched state-space representation, where some or all of the inputs may vary without control over some bounded range, e.g., load current and input voltage. The method relies on solving the reachability problem associated with this system, which is the computation of the set of all possible trajectories that arise from different initial conditions, uncontrolled inputs, and inherent switching. The method allows one to verify whether or not this set (called the reach set) remains within a region of the state-space defined by performance requirements, e.g., output voltage tolerance. Algorithms to solve the reachability problem for power electronics converters with both open- and closed-loop control are provided. The application of the method is illustrated in buck and boost converter examples.

Original languageEnglish (US)
Title of host publication2009 IEEE Energy Conversion Congress and Exposition, ECCE 2009
Pages1126-1132
Number of pages7
DOIs
StatePublished - 2009
Event2009 IEEE Energy Conversion Congress and Exposition, ECCE 2009 - San Jose, CA, United States
Duration: Sep 20 2009Sep 24 2009

Publication series

Name2009 IEEE Energy Conversion Congress and Exposition, ECCE 2009

Other

Other2009 IEEE Energy Conversion Congress and Exposition, ECCE 2009
Country/TerritoryUnited States
CitySan Jose, CA
Period9/20/099/24/09

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'Design verification of power electronics systems subject to bounded uncertain inputs'. Together they form a unique fingerprint.

Cite this