Design of a GaN-based, 9-level flying capacitor multilevel inverter with low inductance layout

Tomas Modeer, Christopher B. Barth, Nathan Pallo, Won Ho Chung, Thomas Foulkes, Robert C.N. Pilawa-Podgurski

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Multilevel inverters such as the flying capacitor multilevel inverter (FCML) hold large potential benefit in applications where the size and weight of the inverter is constrained. This work presents the design and implementation of an inverter module which incorporates two individual 9-level FCML single-phase inverters in an interleaved design. Each inverter utilizes GaN FETs switching at 100 kHz, for an effective inductor ripple frequency of 800 kHz. The implementation features an innovative dual-sided integrated switching cell layout which decreases the effective commutation loop inductance of the inverter and enables fast switching with minimal ringing while also simplifying efficient double-sided cooling.

Original languageEnglish (US)
Title of host publication2017 IEEE Applied Power Electronics Conference and Exposition, APEC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages2582-2589
Number of pages8
ISBN (Electronic)9781509053667
DOIs
StatePublished - May 17 2017
Event32nd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2017 - Tampa, United States
Duration: Mar 26 2017Mar 30 2017

Publication series

NameConference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Other

Other32nd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2017
Country/TerritoryUnited States
CityTampa
Period3/26/173/30/17

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'Design of a GaN-based, 9-level flying capacitor multilevel inverter with low inductance layout'. Together they form a unique fingerprint.

Cite this