Design and implementation of a hypercube multiprocessor

SR Das, NH Vaidya, LM Patnaik

Research output: Contribution to journalArticlepeer-review


The paper reports the design and implementation of a eight-node multiprocessor with the hypercube technology using general-purpose microcomputer boards employing off-the-shelf circuit components. A software communication kernel developed to support the intemode communication in the hypercube is also described.

Original languageEnglish (US)
Pages (from-to)101-106
Number of pages6
JournalMicroprocessors and Microsystems
Issue number2
StatePublished - Mar 1990
Externally publishedYes


  • hypercube
  • message passing
  • multiprocessors

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Computer Networks and Communications
  • Artificial Intelligence


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