Design and fabrication of a 1 Gb/s OEIC receiver for fiber-optic data link applications

Chian Gauh Shih; Wei Heng Chang; Jianshi Wang; Douglas W. Barlage; Chih Chong Teng; Milton Feng

doi:10.1109/50.511677

Design and fabrication of a 1 Gb/s OEIC receiver for fiber-optic data link applications

Chian Gauh Shih, Wei Heng Chang, Jianshi Wang, Douglas W. Barlage, Chih Chong Teng, Milton Feng

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

This paper describes a 1 Gb/s fully monolithic integrated GaAs OEIC receiver based on 0.6 μm gate length D-mode MESFET technology. The adoption of 0.85 μm short wavelength standard permits the integration of low capacitance MSM photodetectors and conventional electronic circuitry onto a single chip. Hence, the viability of low-cost manufacturing of high-speed optoelectronic devices will be improved. The design, fabrication, and testing of the receiver chip is discussed in detail. A BER of less than 10^-9 at 1 Gb/s has been achieved for optical power of -20.5 dBm with a dynamic range of greater than 32 dB. This performance is sufficient for practical use in optical data link systems operating at gigabit/s data rates.

Original language	English (US)
Pages (from-to)	1480-1487
Number of pages	8
Journal	Journal of Lightwave Technology
Volume	14
Issue number	6
DOIs	https://doi.org/10.1109/50.511677
State	Published - Jun 1996

ASJC Scopus subject areas

Atomic and Molecular Physics, and Optics

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10.1109/50.511677

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title = "Design and fabrication of a 1 Gb/s OEIC receiver for fiber-optic data link applications",

abstract = "This paper describes a 1 Gb/s fully monolithic integrated GaAs OEIC receiver based on 0.6 μm gate length D-mode MESFET technology. The adoption of 0.85 μm short wavelength standard permits the integration of low capacitance MSM photodetectors and conventional electronic circuitry onto a single chip. Hence, the viability of low-cost manufacturing of high-speed optoelectronic devices will be improved. The design, fabrication, and testing of the receiver chip is discussed in detail. A BER of less than 10-9 at 1 Gb/s has been achieved for optical power of -20.5 dBm with a dynamic range of greater than 32 dB. This performance is sufficient for practical use in optical data link systems operating at gigabit/s data rates.",

author = "Shih, {Chian Gauh} and Chang, {Wei Heng} and Jianshi Wang and Barlage, {Douglas W.} and Teng, {Chih Chong} and Milton Feng",

note = "Funding Information: Manuscript received March 29, 1995; revised February 20, 1996. This work was supported by the National Science Foundation Grant ECD 89-43166. The authors are with the Department of Electrical and Computer Engineering, Center for Compound Semiconductor Microelectronics, University of Illinois, Urbana, IL 61801 USA. Publisher Item Identifier S 0733-8724(96)04603-8.",

year = "1996",

month = jun,

doi = "10.1109/50.511677",

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AU - Shih, Chian Gauh

AU - Chang, Wei Heng

AU - Wang, Jianshi

AU - Barlage, Douglas W.

AU - Teng, Chih Chong

AU - Feng, Milton

N1 - Funding Information: Manuscript received March 29, 1995; revised February 20, 1996. This work was supported by the National Science Foundation Grant ECD 89-43166. The authors are with the Department of Electrical and Computer Engineering, Center for Compound Semiconductor Microelectronics, University of Illinois, Urbana, IL 61801 USA. Publisher Item Identifier S 0733-8724(96)04603-8.

PY - 1996/6

Y1 - 1996/6

N2 - This paper describes a 1 Gb/s fully monolithic integrated GaAs OEIC receiver based on 0.6 μm gate length D-mode MESFET technology. The adoption of 0.85 μm short wavelength standard permits the integration of low capacitance MSM photodetectors and conventional electronic circuitry onto a single chip. Hence, the viability of low-cost manufacturing of high-speed optoelectronic devices will be improved. The design, fabrication, and testing of the receiver chip is discussed in detail. A BER of less than 10-9 at 1 Gb/s has been achieved for optical power of -20.5 dBm with a dynamic range of greater than 32 dB. This performance is sufficient for practical use in optical data link systems operating at gigabit/s data rates.

AB - This paper describes a 1 Gb/s fully monolithic integrated GaAs OEIC receiver based on 0.6 μm gate length D-mode MESFET technology. The adoption of 0.85 μm short wavelength standard permits the integration of low capacitance MSM photodetectors and conventional electronic circuitry onto a single chip. Hence, the viability of low-cost manufacturing of high-speed optoelectronic devices will be improved. The design, fabrication, and testing of the receiver chip is discussed in detail. A BER of less than 10-9 at 1 Gb/s has been achieved for optical power of -20.5 dBm with a dynamic range of greater than 32 dB. This performance is sufficient for practical use in optical data link systems operating at gigabit/s data rates.

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Design and fabrication of a 1 Gb/s OEIC receiver for fiber-optic data link applications

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