DeNovoND: Efficient hardware support for disciplined non-determinism

Hyojin Sung, Rakesh Komuravelli, Sarita V. Adve

Research output: Contribution to journalArticlepeer-review

Abstract

Recent work has shown that disciplined shared-memory programming models that provide deterministic-by-default semantics can simplify both parallel software and hardware. Specifically, the De- Novo hardware system has shown that the software guarantees of such models (e.g., data-race-freedom and explicit side-effects) can enable simpler, higher performance, and more energy-efficient hardware than the current state-of-the-art for deterministic programs. Many applications, however, contain non-deterministic parts; e.g., using lock synchronization. For commercial hardware to exploit the benefits of DeNovo, it is therefore necessary to extend DeNovo to support non-deterministic applications. This paper proposes DeNovoND, a system that supports lockbased, disciplined non-determinism, with the simplicity, performance, and energy benefits of DeNovo. We use a combination of distributed queue-based locks and access signatures to implement simple memory consistency semantics for safe non-determinism, with a coherence protocol that does not require transient states, invalidation traffic, or directories, and does not incur false sharing. The resulting system is simpler, shows comparable or better execution time, and has 33% less network traffic on average (translating directly into energy savings) relative to a state-of-theart invalidation-based protocol for 8 applications designed for lock synchronization.

Original languageEnglish (US)
Pages (from-to)13-25
Number of pages13
JournalACM SIGPLAN Notices
Volume48
Issue number4
DOIs
StatePublished - Apr 1 2013

Keywords

  • Cache coherence
  • Disciplined parallelism
  • Memory consistency
  • Non-determinism
  • Shared memory

ASJC Scopus subject areas

  • Computer Science(all)

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