@inproceedings{07bbe6fda7e747ada814cfe01dbdd0d4,
title = "Delay optimal low-power circuit clustering for FPGAs with dual supply voltages",
abstract = "This paper presents a delay optimal FPGA clustering algorithm targeting low power. We assume that the configurable logic blocks of the FPGA can be programmed using either a high supply voltage (high-Vdd) or a low supply voltage (low-Vdd). We carry out the clustering procedure with the guarantee that the delay of the circuit under the general delay model is optimal, and in the meantime, logic blocks on the non-critical paths can be driven by low-Vdd to save power. We explore a set of dual-Vdd combinations to find the best ratio between low-Vdd and high-Vdd to achieve the largest power reduction. Experimental results show that our clustering algorithm can achieve power savings by 20.3% on average compared to the clustering result for an FPGA with a single high-Vdd. To our knowledge, this is the first work on dual-Vdd clustering for FPGA architectures.",
keywords = "Circuit clustering, Dual supply voltage, Low-power FPGA",
author = "Deming Chen and Jason Cong",
year = "2004",
doi = "10.1145/1013235.1013259",
language = "English (US)",
isbn = "1581139292",
series = "Proceedings of the 2004 International Symposium on Lower Power Electronics and Design, ISLPED'04",
publisher = "Association for Computing Machinery",
pages = "70--73",
booktitle = "Proceedings of the 2004 International Symposium on Lower Power Electronics and Design, ISLPED'04",
address = "United States",
note = "Proceedings of the 2004 International Symposium on Lower Power Electronics and Design, ISLPED'04 ; Conference date: 09-08-2004 Through 11-08-2004",
}