Defining a high-level programming model for emerging NVRAM technologies

Byte-addressable non-volatile memory is poised to become prevalent in the near future. Thanks to device-level technological advances, hybrid systems of traditional dynamic random-access memory (DRAM) coupled with non-volatile random-access memory (NVRAM) are already present and are expected to be commonplace soon. NVRAM offers orders of magnitude performance improvements over existing storage devices. Due to NVRAM's low overheads, many future applications are expected to leverage the fine-grain durable storage provided by NVRAM. Many frameworks for programming NVRAM have been proposed. Unfortunately, these existing frameworks closely mirror the underlying hardware. This lack of abstraction hurts programmer productivity, makes it easy to write buggy code, and limits the compiler's effectiveness. Furthermore, this low level of abstraction does not match the expectations of managed language users. To rectify this situation, in this paper we describe a new high-level NVRAM programming model amenable to managed languages. Because our model is defined at a high level, it is intuitive, not prone to user bugs, and is flexible enough to allow language implementers to perform many optimizations while still adhering to the model. In addition to proposing this model, we also briefly describe how Java can be extended to support our new model. Finally, we present some initial results on the performance overheads of creating durable applications in NVRAM and describe what future work we intend to complete.