Defect engineering for ultrashallow junctions using surfaces

Edmund G. Seebauer, S. H. Yeong, M. P. Srinivasan, C. T.M. Kwok, R. Vaidyanathan, Benjamin Colombeau, Lap Chan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The behavior of point defects within silicon can be changed significantly by controlling the chemical state at the surface. In ultrashallow junction applications for integrated circuits, such effects can be exploited to reduce transient enhanced diffusion and increase dopant activation. The present work demonstrates such effects experimentally for arsenic and boron.

Original languageEnglish (US)
Title of host publicationECS Transactions - International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS
Subtitle of host publicationNew Materials, Processes and Equipment, 3
Pages365-371
Number of pages7
Edition1
DOIs
StatePublished - Dec 1 2007
EventInternational Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS: New Materials, Processes and Equipment, 3 - 211th ECS Meeting - Chicago, IL, United States
Duration: May 6 2007May 10 2007

Publication series

NameECS Transactions
Number1
Volume6
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

OtherInternational Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS: New Materials, Processes and Equipment, 3 - 211th ECS Meeting
CountryUnited States
CityChicago, IL
Period5/6/075/10/07

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint Dive into the research topics of 'Defect engineering for ultrashallow junctions using surfaces'. Together they form a unique fingerprint.

  • Cite this

    Seebauer, E. G., Yeong, S. H., Srinivasan, M. P., Kwok, C. T. M., Vaidyanathan, R., Colombeau, B., & Chan, L. (2007). Defect engineering for ultrashallow junctions using surfaces. In ECS Transactions - International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS: New Materials, Processes and Equipment, 3 (1 ed., pp. 365-371). (ECS Transactions; Vol. 6, No. 1). https://doi.org/10.1149/1.2727421