Defect engineering for ultrashallow junctions using surfaces

E. G. Seebauer; C. T.M. Kwok; R. Vaidyanathan; Y. V. Kondratenko; S. H. Yeong; M. P. Srinivasan; Benjamin Colombeau; Lap Chan

doi:10.1149/1.2911485

Defect engineering for ultrashallow junctions using surfaces

E. G. Seebauer, C. T.M. Kwok, R. Vaidyanathan, Y. V. Kondratenko, S. H. Yeong, M. P. Srinivasan, Benjamin Colombeau, Lap Chan

Chemical and Biomolecular Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The behavior of point defects within silicon can be changed significantly by controlling the chemical state at the surface. In ultrashallow junction applications for integrated circuits, such effects can be exploited to reduce transient enhanced diffusion and increase dopant activation. The present work demonstrates such effects experimentally for arsenic and boron.

Original language	English (US)
Title of host publication	ECS Transactions - Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 4
Subtitle of host publication	New Materials, Processes, and Equipment
Pages	55-62
Number of pages	8
Edition	1
DOIs	https://doi.org/10.1149/1.2911485
State	Published - Nov 13 2008
Event	Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS: New Materials, Processes, and Equipment, 4 - Phoenix, AZ, United States Duration: May 18 2008 → May 22 2008

Publication series

Name	ECS Transactions
Number	1
Volume	13
ISSN (Print)	1938-5862
ISSN (Electronic)	1938-6737

Other

Other	Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS: New Materials, Processes, and Equipment, 4
Country/Territory	United States
City	Phoenix, AZ
Period	5/18/08 → 5/22/08

ASJC Scopus subject areas

Engineering(all)

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10.1149/1.2911485

Cite this

Seebauer, E. G., Kwok, C. T. M., Vaidyanathan, R., Kondratenko, Y. V., Yeong, S. H., Srinivasan, M. P., Colombeau, B., & Chan, L. (2008). Defect engineering for ultrashallow junctions using surfaces. In ECS Transactions - Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 4: New Materials, Processes, and Equipment (1 ed., pp. 55-62). (ECS Transactions; Vol. 13, No. 1). https://doi.org/10.1149/1.2911485

Defect engineering for ultrashallow junctions using surfaces. / Seebauer, E. G.; Kwok, C. T.M.; Vaidyanathan, R.; Kondratenko, Y. V.; Yeong, S. H.; Srinivasan, M. P.; Colombeau, Benjamin; Chan, Lap.

ECS Transactions - Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 4: New Materials, Processes, and Equipment. 1. ed. 2008. p. 55-62 (ECS Transactions; Vol. 13, No. 1).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Seebauer, EG, Kwok, CTM, Vaidyanathan, R, Kondratenko, YV, Yeong, SH, Srinivasan, MP, Colombeau, B & Chan, L 2008, Defect engineering for ultrashallow junctions using surfaces. in ECS Transactions - Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 4: New Materials, Processes, and Equipment. 1 edn, ECS Transactions, no. 1, vol. 13, pp. 55-62, Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS: New Materials, Processes, and Equipment, 4, Phoenix, AZ, United States, 5/18/08. https://doi.org/10.1149/1.2911485

Seebauer, E. G. ; Kwok, C. T.M. ; Vaidyanathan, R. ; Kondratenko, Y. V. ; Yeong, S. H. ; Srinivasan, M. P. ; Colombeau, Benjamin ; Chan, Lap. / Defect engineering for ultrashallow junctions using surfaces. ECS Transactions - Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 4: New Materials, Processes, and Equipment. 1. ed. 2008. pp. 55-62 (ECS Transactions; 1).

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AU - Yeong, S. H.

AU - Srinivasan, M. P.

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ER -

Defect engineering for ultrashallow junctions using surfaces

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