Defect engineering at the nanoscale: Challenges and trends

Edmund G Seebauer, Prashun Gorai

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Progression of Si-based device processing ever deeper into nanoscale dimensions is creating stiffer challenges for the control and manipulation of atomic-scale defects. For example, the increasing use of multiple chemical elements creates a much more complicated network of defect reactions. The growing surface-tovolume ratios that stem from device shrinkage accentuate the importance of defect interactions with surfaces and interfaces, even though the understanding of these interactions remains in embryonic stages. And previously unrecognized effects of temperature on defect creation during ion implantation, as well as of photostimulated defect diffusion during annealing, manifest themselves more clearly in the nanoscale regime. The present work briefly describes these phenomena, and makes the case that modeling of defect behavior through a combination of quantum calculations, molecular dynamics, Monte Carlo, and continuum simulations -?coupled with appropriate experiments -?has become ever more integral to effective defect engineering.

Original languageEnglish (US)
Title of host publicationHigh Purity Silicon 12
Pages291-302
Number of pages12
Edition5
DOIs
StatePublished - Dec 1 2012
Event12th High Purity Silicon Symposium - 222nd ECS Meeting - Honolulu, HI, United States
Duration: Oct 7 2012Oct 11 2012

Publication series

NameECS Transactions
Number5
Volume50
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

Other12th High Purity Silicon Symposium - 222nd ECS Meeting
CountryUnited States
CityHonolulu, HI
Period10/7/1210/11/12

ASJC Scopus subject areas

  • Engineering(all)

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    Seebauer, E. G., & Gorai, P. (2012). Defect engineering at the nanoscale: Challenges and trends. In High Purity Silicon 12 (5 ed., pp. 291-302). (ECS Transactions; Vol. 50, No. 5). https://doi.org/10.1149/05005.0291ecst