DATA STRUCTURE PROCESSOR FOR VLSI GEOMETRY CHECKING.

Erik C. Carlson, Rob A. Rutenbar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A process architecture to support VLSI mask checking is described. Rather than recast the entire verification task in hardware, the authors identify primitives around which geometry checking tools can be built, and accelerate these primitives. The architecture is based on a restructuring of classical scanline-sweep methods for direct hardware interpretation. Boolean operations and region numbering are supported for masks with restricted oblique geometry. Simulation benchmarks suggest practical speedups are attainable.

Original languageEnglish (US)
Title of host publicationUnknown Host Publication Title
PublisherIEEE
Pages404-407
Number of pages4
ISBN (Print)0818607440
StatePublished - Dec 1 1986

ASJC Scopus subject areas

  • Engineering(all)

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