Abstract
Producing densely packed high aspect ratio In0.53Ga0.47As nanostructures without surface damage is critical for beyond Si-CMOS nanoelectronic and optoelectronic devices. However, conventional dry etching methods are known to produce irreversible damage to III-V compound semiconductors because of the inherent high-energy ion-driven process. In this work, we demonstrate the realization of ordered, uniform, array-based In0.53Ga0.47As pillars with diameters as small as 200 nm using the damage-free metal-assisted chemical etching (MacEtch) technology combined with the post-MacEtch digital etching smoothing. The etching mechanism of InxGa1-xAs is explored through the characterization of pillar morphology and porosity as a function of etching condition and indium composition. The etching behavior of In0.53Ga0.47As, in contrast to higher bandgap semiconductors (e.g., Si or GaAs), can be interpreted by a Schottky barrier height model that dictates the etching mechanism constantly in the mass transport limited regime because of the low barrier height. A broader impact of this work relates to the complete elimination of surface roughness or porosity related defects, which can be prevalent byproducts of MacEtch, by post-MacEtch digital etching. Side-by-side comparison of the midgap interface state density and flat-band capacitance hysteresis of both the unprocessed planar and MacEtched pillar In0.53Ga0.47As metal-oxide-semiconductor capacitors further confirms that the surface of the resultant pillars is as smooth and defect-free as before etching. MacEtch combined with digital etching offers a simple, room-temperature, and low-cost method for the formation of high-quality In0.53Ga0.47As nanostructures that will potentially enable large-volume production of In0.53Ga0.47As-based devices including three-dimensional transistors and high-efficiency infrared photodetectors.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 10193-10205 |
| Number of pages | 13 |
| Journal | ACS Nano |
| Volume | 11 |
| Issue number | 10 |
| DOIs | |
| State | Published - Oct 24 2017 |
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Keywords
- InGaAs
- MOSCAPs
- MacEtch
- Schottky barrier height
- digital etching
- metal-assisted chemical etching
- porous shell
ASJC Scopus subject areas
- Materials Science(all)
- Engineering(all)
- Physics and Astronomy(all)
Cite this
Damage-Free Smooth-Sidewall InGaAs Nanopillar Array by Metal-Assisted Chemical Etching. / Kong, Lingyu; Song, Yi; Kim, Jeong Dong; Yu, Lan; Wasserman, Daniel; Chim, Wai Kin; Chiam, Sing Yang; Li, Xiuling.
In: ACS Nano, Vol. 11, No. 10, 24.10.2017, p. 10193-10205.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Damage-Free Smooth-Sidewall InGaAs Nanopillar Array by Metal-Assisted Chemical Etching
AU - Kong, Lingyu
AU - Song, Yi
AU - Kim, Jeong Dong
AU - Yu, Lan
AU - Wasserman, Daniel
AU - Chim, Wai Kin
AU - Chiam, Sing Yang
AU - Li, Xiuling
PY - 2017/10/24
Y1 - 2017/10/24
N2 - Producing densely packed high aspect ratio In0.53Ga0.47As nanostructures without surface damage is critical for beyond Si-CMOS nanoelectronic and optoelectronic devices. However, conventional dry etching methods are known to produce irreversible damage to III-V compound semiconductors because of the inherent high-energy ion-driven process. In this work, we demonstrate the realization of ordered, uniform, array-based In0.53Ga0.47As pillars with diameters as small as 200 nm using the damage-free metal-assisted chemical etching (MacEtch) technology combined with the post-MacEtch digital etching smoothing. The etching mechanism of InxGa1-xAs is explored through the characterization of pillar morphology and porosity as a function of etching condition and indium composition. The etching behavior of In0.53Ga0.47As, in contrast to higher bandgap semiconductors (e.g., Si or GaAs), can be interpreted by a Schottky barrier height model that dictates the etching mechanism constantly in the mass transport limited regime because of the low barrier height. A broader impact of this work relates to the complete elimination of surface roughness or porosity related defects, which can be prevalent byproducts of MacEtch, by post-MacEtch digital etching. Side-by-side comparison of the midgap interface state density and flat-band capacitance hysteresis of both the unprocessed planar and MacEtched pillar In0.53Ga0.47As metal-oxide-semiconductor capacitors further confirms that the surface of the resultant pillars is as smooth and defect-free as before etching. MacEtch combined with digital etching offers a simple, room-temperature, and low-cost method for the formation of high-quality In0.53Ga0.47As nanostructures that will potentially enable large-volume production of In0.53Ga0.47As-based devices including three-dimensional transistors and high-efficiency infrared photodetectors.
AB - Producing densely packed high aspect ratio In0.53Ga0.47As nanostructures without surface damage is critical for beyond Si-CMOS nanoelectronic and optoelectronic devices. However, conventional dry etching methods are known to produce irreversible damage to III-V compound semiconductors because of the inherent high-energy ion-driven process. In this work, we demonstrate the realization of ordered, uniform, array-based In0.53Ga0.47As pillars with diameters as small as 200 nm using the damage-free metal-assisted chemical etching (MacEtch) technology combined with the post-MacEtch digital etching smoothing. The etching mechanism of InxGa1-xAs is explored through the characterization of pillar morphology and porosity as a function of etching condition and indium composition. The etching behavior of In0.53Ga0.47As, in contrast to higher bandgap semiconductors (e.g., Si or GaAs), can be interpreted by a Schottky barrier height model that dictates the etching mechanism constantly in the mass transport limited regime because of the low barrier height. A broader impact of this work relates to the complete elimination of surface roughness or porosity related defects, which can be prevalent byproducts of MacEtch, by post-MacEtch digital etching. Side-by-side comparison of the midgap interface state density and flat-band capacitance hysteresis of both the unprocessed planar and MacEtched pillar In0.53Ga0.47As metal-oxide-semiconductor capacitors further confirms that the surface of the resultant pillars is as smooth and defect-free as before etching. MacEtch combined with digital etching offers a simple, room-temperature, and low-cost method for the formation of high-quality In0.53Ga0.47As nanostructures that will potentially enable large-volume production of In0.53Ga0.47As-based devices including three-dimensional transistors and high-efficiency infrared photodetectors.
KW - InGaAs
KW - MOSCAPs
KW - MacEtch
KW - Schottky barrier height
KW - digital etching
KW - metal-assisted chemical etching
KW - porous shell
UR - http://www.scopus.com/inward/record.url?scp=85033376550&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85033376550&partnerID=8YFLogxK
U2 - 10.1021/acsnano.7b04752
DO - 10.1021/acsnano.7b04752
M3 - Article
C2 - 28880533
AN - SCOPUS:85033376550
VL - 11
SP - 10193
EP - 10205
JO - ACS Nano
JF - ACS Nano
SN - 1936-0851
IS - 10
ER -