TY - GEN
T1 - Cyrus
T2 - 18th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2013
AU - Honarmand, Nima
AU - Dautenhahn, Nathan
AU - Torrellas, Josep
AU - King, Samuel T.
AU - Pokam, Gilles
AU - Pereira, Cristiano
PY - 2013
Y1 - 2013
N2 - Architectures for deterministic record-replay (R&R) of multithreaded code are attractive for program debugging, intrusion analysis, and fault-tolerance uses. However, very few of the proposed designs have focused on maximizing replay speed - a key enabling property of these systems. The few efforts that focus on replay speed require intrusive hardware or software modifications, or target whole-system R&R rather than the more useful applicationlevel R&R. This paper presents the first hardware-based scheme for unintrusive, application-level R&R that explicitly targets high replay speed. Our scheme, called Cyrus, requires no modification to commodity snoopy cache coherence. It introduces the concept of an onthe- fly software Backend Pass during recording which, as the log is being generated, transforms it for high replay parallelism. This pass also fixes-up the log, and can flexibly trade-off replay parallelism for log size.We analyze the performance of Cyrus using full system (OS plus hardware) simulation. Our results show that Cyrus has negligible recording overhead. In addition, for 8-processor runs of SPLASH-2, Cyrus attains an average replay parallelism of 5, and a replay speed that is, on average, only about 50% lower than the recording speed. Categories and Subject Descriptors C.0 [General]: Hardware/ Software Interfaces; C.1.2 [Processor Architectures]: Multiple Data Stream Architectures (Multiprocessors) - MIMD Processors; D.1.3 [Programming Techniques]: Concurrent Programming - Parallel Programming; D.1.3 [Programming Techniques]: Concurrent Programming - Parallel Programming; D.4.0 [Operating Systems]: General; D.4.1 [Operating Systems]: Process Management - Threads.
AB - Architectures for deterministic record-replay (R&R) of multithreaded code are attractive for program debugging, intrusion analysis, and fault-tolerance uses. However, very few of the proposed designs have focused on maximizing replay speed - a key enabling property of these systems. The few efforts that focus on replay speed require intrusive hardware or software modifications, or target whole-system R&R rather than the more useful applicationlevel R&R. This paper presents the first hardware-based scheme for unintrusive, application-level R&R that explicitly targets high replay speed. Our scheme, called Cyrus, requires no modification to commodity snoopy cache coherence. It introduces the concept of an onthe- fly software Backend Pass during recording which, as the log is being generated, transforms it for high replay parallelism. This pass also fixes-up the log, and can flexibly trade-off replay parallelism for log size.We analyze the performance of Cyrus using full system (OS plus hardware) simulation. Our results show that Cyrus has negligible recording overhead. In addition, for 8-processor runs of SPLASH-2, Cyrus attains an average replay parallelism of 5, and a replay speed that is, on average, only about 50% lower than the recording speed. Categories and Subject Descriptors C.0 [General]: Hardware/ Software Interfaces; C.1.2 [Processor Architectures]: Multiple Data Stream Architectures (Multiprocessors) - MIMD Processors; D.1.3 [Programming Techniques]: Concurrent Programming - Parallel Programming; D.1.3 [Programming Techniques]: Concurrent Programming - Parallel Programming; D.4.0 [Operating Systems]: General; D.4.1 [Operating Systems]: Process Management - Threads.
KW - Application-level parallel replay
KW - Backend log processing
KW - Deterministic replay
KW - Source-only recording
KW - Unintrusive hardware-assisted recording
UR - http://www.scopus.com/inward/record.url?scp=84875675910&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84875675910&partnerID=8YFLogxK
U2 - 10.1145/2451116.2451138
DO - 10.1145/2451116.2451138
M3 - Conference contribution
AN - SCOPUS:84875675910
SN - 9781450318709
T3 - International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS
SP - 193
EP - 206
BT - ASPLOS 2013 - 18th International Conference on Architectural Support for Programming Languages and Operating Systems
Y2 - 16 March 2013 through 20 March 2013
ER -