CRITICAL ISSUES REGARDING HPS, A HIGH PERFORMANCE MICROARCHITECTURE.

Yale N. Patt, Stephen W. Melvin, Wen mei Hwu, Michael C. Shebanow

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

HPS is a new model for high performance microarchitecture which is targeted for implementing very dissimilar ISP architectures. It derives its performance from executing the operations within a restricted window of a program out-of-order, asynchronously, and concurrently whenever possible. Before the model can be reduced to an effective working implementation of a particular target architecture, several issues need to be resolved. These issues, both in general and in the context of architectures with specific characteristics, are discussed.

Original languageEnglish (US)
Title of host publicationMICRO
Subtitle of host publicationAnnual Microprogramming Workshop
PublisherACM
Pages109-116
Number of pages8
ISBN (Print)0897911725, 9780897911726
DOIs
StatePublished - 1985
Externally publishedYes

Publication series

NameMICRO: Annual Microprogramming Workshop
ISSN (Print)0361-2163

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Patt, Y. N., Melvin, S. W., Hwu, W. M., & Shebanow, M. C. (1985). CRITICAL ISSUES REGARDING HPS, A HIGH PERFORMANCE MICROARCHITECTURE. In MICRO: Annual Microprogramming Workshop (pp. 109-116). (MICRO: Annual Microprogramming Workshop). ACM. https://doi.org/10.1145/18927.18917