@inproceedings{77b852406727453a9dc1590a843ac5a8,
title = "CRITICAL ISSUES REGARDING HPS, A HIGH PERFORMANCE MICROARCHITECTURE.",
abstract = "HPS is a new model for high performance microarchitecture which is targeted for implementing very dissimilar ISP architectures. It derives its performance from executing the operations within a restricted window of a program out-of-order, asynchronously, and concurrently whenever possible. Before the model can be reduced to an effective working implementation of a particular target architecture, several issues need to be resolved. These issues, both in general and in the context of architectures with specific characteristics, are discussed.",
author = "Patt, {Yale N.} and Melvin, {Stephen W.} and Hwu, {Wen mei} and Shebanow, {Michael C.}",
year = "1985",
doi = "10.1145/18927.18917",
language = "English (US)",
isbn = "0897911725",
series = "MICRO: Annual Microprogramming Workshop",
publisher = "ACM",
pages = "109--116",
booktitle = "MICRO",
}