CPP: A Multi-Level Circuit Partitioning Predictor for Hardware Verification Systems

Keyphrases

• Hardware Verification 100%
• Circuit Partitioning 100%
• Verification System 100%
• Multi-level Circuit 100%
• Path Delay 66%
• Computation Time 33%
• Computational Resources 33%
• Global Path 33%
• Hardware Constraints 33%
• Functional Verification 33%
• Application-specific Hardware 33%
• Delay Prediction 33%
• Convolutional Neural Network 33%
• Multiple Partitions 33%
• Local Path 33%
• Path Structures 33%
• Prediction Framework 33%
• Hardware-assisted 33%
• Path Representation 33%
• Verification Efficiency 33%
• Path Delay Prediction 33%

Computer Science

• Verification System 100%
• Computer Hardware 100%
• Functional Verification 25%
• Multiple Partition 25%
• Prediction Framework 25%
• Path Representation 25%
• Convolutional Neural Network 25%