TY - JOUR
T1 - Control Architecture for LLC Resonant Converters with High Input Disturbance Rejection Capability Using Output Diode Current
AU - Maheshwari, Anuj
AU - Karakaya, Furkan
AU - Banerjee, Arijit
AU - Donnal, John S.
N1 - VI. ACKNOWLEDGEMENT This work was funded by the Office of Naval Research MVDC Risk Reduction program under Grant Numbers N000142112277, N0001418WX01706, and N000141812889. It is approved for public release with unlimited distribution (DCN 543-2383-24). This work was also supported in part by the Grainger Center for Electric Machinery and Electromechanics.
This work was funded by the Office of Naval Research MVDC Risk Reduction program under Grant Numbers N000142112277, N0001418WX01706 and N000141812889. (Corresponding author: Arijit Banerjee.) Anuj Maheshwari, Furkan Karakaya, and Arijit Banerjee are with the Department of Electrical and Computer Engineering, University of Illinois Urbana-Champaign, Urbana, IL, 61801, USA (e-mail: [email protected]; [email protected]; [email protected]).
PY - 2024
Y1 - 2024
N2 - The controller design for the LLC resonant dc-dc converter is challenging due to the large number of poles whose locations vary with operating conditions. A controller's ability to reject input disturbance is required to reduce the input filter size, increase power density, and improve reliability. This article presents a control architecture utilizing the output diode current measurement that reduces the control-to-output transfer function for an LLC resonant converter to first order and provides a high degree of input voltage disturbance rejection with a marginal increase in implementation complexity. The increased disturbance rejection allows the reduction of the bulky dc-link capacitance at the output of the PFC in electric vehicle battery charging application. A small-signal model for the proposed control variable is derived, and loop analysis using a Bode plot highlights the advantages of the proposed method. Simulation results verify the proposed architecture's high disturbance rejection capabilities. The proposed control architecture is evaluated using a 1 kW front-end power factor correction (PFC) rectifier followed by an LLC resonant converter with an intermediate dc-link voltage of 400 V. The proposed approach achieves a 4.5x reduction in the energy storage requirement in the intermediate dc link compared to direct frequency control without sacrificing output voltage ripple and efficiency of the LLC stage and total harmonic distortion at the input of the PFC stage.
AB - The controller design for the LLC resonant dc-dc converter is challenging due to the large number of poles whose locations vary with operating conditions. A controller's ability to reject input disturbance is required to reduce the input filter size, increase power density, and improve reliability. This article presents a control architecture utilizing the output diode current measurement that reduces the control-to-output transfer function for an LLC resonant converter to first order and provides a high degree of input voltage disturbance rejection with a marginal increase in implementation complexity. The increased disturbance rejection allows the reduction of the bulky dc-link capacitance at the output of the PFC in electric vehicle battery charging application. A small-signal model for the proposed control variable is derived, and loop analysis using a Bode plot highlights the advantages of the proposed method. Simulation results verify the proposed architecture's high disturbance rejection capabilities. The proposed control architecture is evaluated using a 1 kW front-end power factor correction (PFC) rectifier followed by an LLC resonant converter with an intermediate dc-link voltage of 400 V. The proposed approach achieves a 4.5x reduction in the energy storage requirement in the intermediate dc link compared to direct frequency control without sacrificing output voltage ripple and efficiency of the LLC stage and total harmonic distortion at the input of the PFC stage.
KW - LLC resonant converter
KW - Second harmonic ripple reduction
KW - single phase rectifier
KW - small signal analysis
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U2 - 10.1109/TPEL.2024.3475251
DO - 10.1109/TPEL.2024.3475251
M3 - Article
AN - SCOPUS:85206011386
SN - 0885-8993
VL - 40
SP - 652
EP - 664
JO - IEEE Transactions on Power Electronics
JF - IEEE Transactions on Power Electronics
IS - 1
ER -