Abstract
Computer analysis of nanocrystal memory transistors based on floating gate technology was carried out. Quantization of electronic structure and single-electron charging of nanocrystals was investigated. Effects of geometry and strain due to lattice mismatch on nanocrystals were studied. The device was simulated using Schrodinger and Poisson equations.
| Original language | English (US) |
|---|---|
| Title of host publication | Annual Device Research Conference Digest |
| Pages | 69-70 |
| Number of pages | 2 |
| State | Published - 2001 |
| Event | Device Research Conference (DRC) - Notre Dame, IN, United States Duration: Jun 25 2001 → Jun 27 2001 |
Other
| Other | Device Research Conference (DRC) |
|---|---|
| Country | United States |
| City | Notre Dame, IN |
| Period | 6/25/01 → 6/27/01 |
ASJC Scopus subject areas
- Engineering(all)
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Thean, A., & Leburton, J-P. (2001). Computer analysis of geometry and strain effects in silicon nano-crystal floating-gate flash memory devices. In Annual Device Research Conference Digest (pp. 69-70)