@inproceedings{6539452e59d04552bba84de6a6117191,
title = "Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation",
abstract = "The accuracy of eNVM in-memory computing (IMC) designs is primarily limited by analog non-idealities. This paper presents an MRAM IMC macro in 22nm equipped with offset-compensating current sensing and a low-overhead statistical error compensation (SEC) block to boost its compute signal-to-noise ratio (SNR). The compute SNR reduces with an increase in inner-dimension of the MVM. An SEC-enabled SNR boost of 2.7-to-6 dB is obtained over different operating points. This boost can be traded-off to realize a 5 × decrease in energy/lb-OP including an SEC energy overhead of 0.S%. Finally, we demonstrate an SEC-enabled neural network (NN) accuracy boost from 74.8% to 82.0% for CIFAR-10 over ResNet20 without on-chip training.",
keywords = "Compute SNR, In-Memory Computing, MRAM, eNVM",
author = "Roy, {Saion K.} and Ou, {Han Mo} and Ahmed, {Mostafa G.} and Peter Deaville and Bonan Zhang and Naveen Verma and Hanumolu, {Pavan K.} and Shanbhag, {Naresh R.}",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 49th IEEE European Solid State Circuits Conference, ESSCIRC 2023 ; Conference date: 11-09-2023 Through 14-09-2023",
year = "2023",
doi = "10.1109/ESSCIRC59616.2023.10268688",
language = "English (US)",
series = "European Solid-State Circuits Conference",
publisher = "IEEE Computer Society",
pages = "25--28",
booktitle = "ESSCIRC 2023 - IEEE 49th European Solid State Circuits Conference",
}