TY - GEN
T1 - Comprehensive models for the investigation of on-chip switching noise generation and coupling
AU - Ihm, Jae Yong
AU - Chung, In Jae
AU - Manetas, Giorgos
AU - Cangellaris, Andreas C.
PY - 2005
Y1 - 2005
N2 - A comprehensive modeling methodology is presented for the investigation of on-chip noise generation and coupling due to power switching. The methodology utilizes a comprehensive electromagnetic model for the on-chip portion of the power grid. Thus, the tedious and error-prone extraction of a distributed RLC model for the power grid is avoided and the generated model allows for power grid induced broadband and distributed noise coupling to be taken into account in the transient simulation. The electromagnetic model for the power grid is complemented by a distributed RC model for the semiconductor substrate and RLCG models for the interconnects. Thus, a comprehensive model results for the quantification of on-chip interconnect and power grid noise effects during switching. Transient simulations using this model are carried out using a hybrid time-domain integration scheme which combines a SPICE-like engine for the analysis of all RLCG netlists and the nonlinear drivers incorporated in the model with a numerical integration algorithm for the discrete electromagnetic model for the power grid.
AB - A comprehensive modeling methodology is presented for the investigation of on-chip noise generation and coupling due to power switching. The methodology utilizes a comprehensive electromagnetic model for the on-chip portion of the power grid. Thus, the tedious and error-prone extraction of a distributed RLC model for the power grid is avoided and the generated model allows for power grid induced broadband and distributed noise coupling to be taken into account in the transient simulation. The electromagnetic model for the power grid is complemented by a distributed RC model for the semiconductor substrate and RLCG models for the interconnects. Thus, a comprehensive model results for the quantification of on-chip interconnect and power grid noise effects during switching. Transient simulations using this model are carried out using a hybrid time-domain integration scheme which combines a SPICE-like engine for the analysis of all RLCG netlists and the nonlinear drivers incorporated in the model with a numerical integration algorithm for the discrete electromagnetic model for the power grid.
KW - FDTD/SPICE hybrid trasient simulation
KW - On-chip power grid swithcing
KW - Power-grid common-impedance coupling
KW - Substrate noise coupling
KW - Switching noise analysis
UR - http://www.scopus.com/inward/record.url?scp=33644978249&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33644978249&partnerID=8YFLogxK
U2 - 10.1109/ISEMC.2005.1513597
DO - 10.1109/ISEMC.2005.1513597
M3 - Conference contribution
AN - SCOPUS:33644978249
SN - 0780393805
SN - 9780780393806
T3 - IEEE International Symposium on Electromagnetic Compatibility
SP - 666
EP - 671
BT - 2005 International Symposium on Electromagnetic Compatibility, EMC 2005
T2 - 2005 International Symposium on Electromagnetic Compatibility, EMC 2005
Y2 - 8 August 2005 through 12 August 2005
ER -