@article{96a7651515bd473ebc40bc075c19a2b5,
title = "Compiler-Assisted Multiple Instruction Rollback Recovery Using a Read Buffer",
abstract = "Multiple instruction rollback (MIR) is a technique that has been implemented in mainframe computers to provide rapid recovery from transient processor failures. Hardware-based MIR designs eliminate rollback data hazards by providing data redundancy implemented in hardware. Compiler-based MIR designs have also been developed which remove rollback data hazards directly with data-flow transformations. This paper describes compiler-assisted techniques to achieve multiple instruction rollback recovery. We observe that some data hazards resulting from instruction rollback can be resolved efficiently by providing an operand read buffer while others are resolved more efficiently with compiler transformations. The compiler-assisted scheme presented consists of hardware that is less complex than shadow files, history files, history buffers, or delayed write buffers, while experimental evaluation indicates performance improvement over compiler-based schemes.",
keywords = "Fault-tolerance, compilers, error recovery, instruction retry",
author = "Alewine, {Neal J.} and Chen, {Shyh Kwei} and Fuchs, {W. Kent} and Hwu, {Wen Mei W.}",
note = "Funding Information: The authors wish to thank C.-C. Jim Li for his help with the compiler aspects of this paper, and Scott Mahlke and William Chen for their invaluable assistance with the IMPACT compiler. We also express our thanks to Jan& Pate1 for his contributions to this research. This research was supported in part by the National Aeronautics and Space Administration (NASA) under grant NASA NAG 1-613, in cooperation with the Illinois Computer Laboratory for Aerospace Systems and Software (ICLASS), and in part by the U.S. Department of the Navy and managed by the Office of the Chief of Naval Research under Contract N00014-9 1-J-1 283. Funding Information: degree in computer science from the University of California, Berkeley, in 1987. Dr. Hwu is an associate professor in the Depart-ment of Electrical and Computer Engineering, Uni-versity of Illinois at Urbana-Champaign. His re- search interest is in the area of architecture, imple-mentation, and compilation for high-performance computer systems. He is the director of the IMPACT proiect, which has delivered new compiler and compute; architecture technologies to the com- puter industry since 1987. The IMPACT project has been sponsored by NSF, ONR, and NASA as well as major corporations such as Hewlett-Packard, Intel, SUN, NCR, AMD, and Matsushita. In recognition of his contributions to the areas of compiler optimization and computer architecture, the Intel Corporation named him the Intel Associate Professor at the College of Engineering, University of Illinois, in 1992. He received the National Eta Kappa Nu Outstanding Young Electrical Engineer Award for 1993 and the 1994 Senior Xerox Award for Faculty Research.",
year = "1995",
month = sep,
doi = "10.1109/12.464388",
language = "English (US)",
volume = "44",
pages = "1096--1107",
journal = "IEEE Transactions on Computers",
issn = "0018-9340",
publisher = "IEEE Computer Society",
number = "9",
}