Compensating for sneak currents in multi-level crosspoint resistive memories

Tianqiong Luo; Olgica Milenkovic; Borja Peleato

doi:10.1109/ACSSC.2015.7421253

Compensating for sneak currents in multi-level crosspoint resistive memories

Tianqiong Luo, Olgica Milenkovic, Borja Peleato

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Crosspoint architectures for ReRAM offer highei density, power efficiency, and endurance than most other emerging memory technologies, but they suffer sneak currents thai cause significant write and read noise. Existing solutions limil the array size to ensure that the resulting noise falls within the margin between resistance levels but this might not be possible for MLC ReRAM memories. This paper builds a simple analytic model for the voltage drop and sneak currents in MLC-ReRAM arrays as a form of inter-cell-interference and proposes two techniques to minimize the resulting BER: spreading modulation and distribution shaping.

Original language	English (US)
Title of host publication	Conference Record of the 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015
Editors	Michael B. Matthews
Publisher	IEEE Computer Society
Pages	839-843
Number of pages	5
ISBN (Electronic)	9781467385763
DOIs	https://doi.org/10.1109/ACSSC.2015.7421253
State	Published - Feb 26 2016
Event	49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 - Pacific Grove, United States Duration: Nov 8 2015 → Nov 11 2015

Publication series

Name	Conference Record - Asilomar Conference on Signals, Systems and Computers
Volume	2016-February
ISSN (Print)	1058-6393

Other

Other	49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015
Country/Territory	United States
City	Pacific Grove
Period	11/8/15 → 11/11/15

ASJC Scopus subject areas

Signal Processing
Computer Networks and Communications

Online availability

10.1109/ACSSC.2015.7421253

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Luo, T., Milenkovic, O., & Peleato, B. (2016). Compensating for sneak currents in multi-level crosspoint resistive memories. In M. B. Matthews (Ed.), Conference Record of the 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015 (pp. 839-843). Article 7421253 (Conference Record - Asilomar Conference on Signals, Systems and Computers; Vol. 2016-February). IEEE Computer Society. https://doi.org/10.1109/ACSSC.2015.7421253

Compensating for sneak currents in multi-level crosspoint resistive memories. / Luo, Tianqiong; Milenkovic, Olgica; Peleato, Borja.
Conference Record of the 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015. ed. / Michael B. Matthews. IEEE Computer Society, 2016. p. 839-843 7421253 (Conference Record - Asilomar Conference on Signals, Systems and Computers; Vol. 2016-February).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Luo, T, Milenkovic, O & Peleato, B 2016, Compensating for sneak currents in multi-level crosspoint resistive memories. in MB Matthews (ed.), Conference Record of the 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015., 7421253, Conference Record - Asilomar Conference on Signals, Systems and Computers, vol. 2016-February, IEEE Computer Society, pp. 839-843, 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015, Pacific Grove, United States, 11/8/15. https://doi.org/10.1109/ACSSC.2015.7421253

Luo T, Milenkovic O, Peleato B. Compensating for sneak currents in multi-level crosspoint resistive memories. In Matthews MB, editor, Conference Record of the 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015. IEEE Computer Society. 2016. p. 839-843. 7421253. (Conference Record - Asilomar Conference on Signals, Systems and Computers). doi: 10.1109/ACSSC.2015.7421253

Luo, Tianqiong ; Milenkovic, Olgica ; Peleato, Borja. / Compensating for sneak currents in multi-level crosspoint resistive memories. Conference Record of the 49th Asilomar Conference on Signals, Systems and Computers, ACSSC 2015. editor / Michael B. Matthews. IEEE Computer Society, 2016. pp. 839-843 (Conference Record - Asilomar Conference on Signals, Systems and Computers).

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AB - Crosspoint architectures for ReRAM offer highei density, power efficiency, and endurance than most other emerging memory technologies, but they suffer sneak currents thai cause significant write and read noise. Existing solutions limil the array size to ensure that the resulting noise falls within the margin between resistance levels but this might not be possible for MLC ReRAM memories. This paper builds a simple analytic model for the voltage drop and sneak currents in MLC-ReRAM arrays as a form of inter-cell-interference and proposes two techniques to minimize the resulting BER: spreading modulation and distribution shaping.

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Compensating for sneak currents in multi-level crosspoint resistive memories

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