Comparison of full and partial predicated execution support for ILP processors

Scott A. Mahlke, Richard E. Hank, James E. McCormick, David I. August, Wen mei W. Hwu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

One can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of predicated execution are high, the tradeoffs involved in the design of an instruction set to support predicated execution can be difficult. On one end of the design spectrum, architectural support for full predicated execution requires increasing the number of source operands for all instructions. Full predicate support provides for the most flexibility and the largest potential performance improvements. On the other end, partial predicated execution support, such as conditional moves, requires very little change to existing architectures. This paper presents a preliminary study to qualitatively and quantitatively address the benefit of full and partial predicated execution support. With our current compiler technology, we show that the compiler can use both partial and full predication to achieve speedup in large control-intensive programs. Some details of the code generation techniques are shown to provide insight into the benefit of going from partial to full predication. Preliminary experimental results are very encouraging: partial predication provides an average of 33% performance improvement for an 8-issue processor with no predicate support while full predication provides an additional 30% improvement.

Original languageEnglish (US)
Title of host publicationConference Proceedings - Annual International Symposium on Computer Architecture, ISCA
Pages138-149
Number of pages12
StatePublished - Jan 1 1995
EventProceedings of the 1995 22nd Annual International Symposium on Computer Architecture - Santa Margherita Ligure, Italy
Duration: Jun 22 1995Jun 24 1995

Publication series

NameConference Proceedings - Annual International Symposium on Computer Architecture, ISCA
ISSN (Print)0884-7495

Other

OtherProceedings of the 1995 22nd Annual International Symposium on Computer Architecture
CitySanta Margherita Ligure, Italy
Period6/22/956/24/95

Fingerprint

Inductive logic programming (ILP)
Code generation

ASJC Scopus subject areas

  • Hardware and Architecture

Cite this

Mahlke, S. A., Hank, R. E., McCormick, J. E., August, D. I., & Hwu, W. M. W. (1995). Comparison of full and partial predicated execution support for ILP processors. In Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA (pp. 138-149). (Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA).

Comparison of full and partial predicated execution support for ILP processors. / Mahlke, Scott A.; Hank, Richard E.; McCormick, James E.; August, David I.; Hwu, Wen mei W.

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. 1995. p. 138-149 (Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Mahlke, SA, Hank, RE, McCormick, JE, August, DI & Hwu, WMW 1995, Comparison of full and partial predicated execution support for ILP processors. in Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA, pp. 138-149, Proceedings of the 1995 22nd Annual International Symposium on Computer Architecture, Santa Margherita Ligure, Italy, 6/22/95.
Mahlke SA, Hank RE, McCormick JE, August DI, Hwu WMW. Comparison of full and partial predicated execution support for ILP processors. In Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. 1995. p. 138-149. (Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA).
Mahlke, Scott A. ; Hank, Richard E. ; McCormick, James E. ; August, David I. ; Hwu, Wen mei W. / Comparison of full and partial predicated execution support for ILP processors. Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA. 1995. pp. 138-149 (Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA).
@inproceedings{73b1d38f63f24ac4a7bb5d14369876cb,
title = "Comparison of full and partial predicated execution support for ILP processors",
abstract = "One can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of predicated execution are high, the tradeoffs involved in the design of an instruction set to support predicated execution can be difficult. On one end of the design spectrum, architectural support for full predicated execution requires increasing the number of source operands for all instructions. Full predicate support provides for the most flexibility and the largest potential performance improvements. On the other end, partial predicated execution support, such as conditional moves, requires very little change to existing architectures. This paper presents a preliminary study to qualitatively and quantitatively address the benefit of full and partial predicated execution support. With our current compiler technology, we show that the compiler can use both partial and full predication to achieve speedup in large control-intensive programs. Some details of the code generation techniques are shown to provide insight into the benefit of going from partial to full predication. Preliminary experimental results are very encouraging: partial predication provides an average of 33{\%} performance improvement for an 8-issue processor with no predicate support while full predication provides an additional 30{\%} improvement.",
author = "Mahlke, {Scott A.} and Hank, {Richard E.} and McCormick, {James E.} and August, {David I.} and Hwu, {Wen mei W.}",
year = "1995",
month = "1",
day = "1",
language = "English (US)",
isbn = "0780330005",
series = "Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA",
pages = "138--149",
booktitle = "Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA",

}

TY - GEN

T1 - Comparison of full and partial predicated execution support for ILP processors

AU - Mahlke, Scott A.

AU - Hank, Richard E.

AU - McCormick, James E.

AU - August, David I.

AU - Hwu, Wen mei W.

PY - 1995/1/1

Y1 - 1995/1/1

N2 - One can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of predicated execution are high, the tradeoffs involved in the design of an instruction set to support predicated execution can be difficult. On one end of the design spectrum, architectural support for full predicated execution requires increasing the number of source operands for all instructions. Full predicate support provides for the most flexibility and the largest potential performance improvements. On the other end, partial predicated execution support, such as conditional moves, requires very little change to existing architectures. This paper presents a preliminary study to qualitatively and quantitatively address the benefit of full and partial predicated execution support. With our current compiler technology, we show that the compiler can use both partial and full predication to achieve speedup in large control-intensive programs. Some details of the code generation techniques are shown to provide insight into the benefit of going from partial to full predication. Preliminary experimental results are very encouraging: partial predication provides an average of 33% performance improvement for an 8-issue processor with no predicate support while full predication provides an additional 30% improvement.

AB - One can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of predicated execution are high, the tradeoffs involved in the design of an instruction set to support predicated execution can be difficult. On one end of the design spectrum, architectural support for full predicated execution requires increasing the number of source operands for all instructions. Full predicate support provides for the most flexibility and the largest potential performance improvements. On the other end, partial predicated execution support, such as conditional moves, requires very little change to existing architectures. This paper presents a preliminary study to qualitatively and quantitatively address the benefit of full and partial predicated execution support. With our current compiler technology, we show that the compiler can use both partial and full predication to achieve speedup in large control-intensive programs. Some details of the code generation techniques are shown to provide insight into the benefit of going from partial to full predication. Preliminary experimental results are very encouraging: partial predication provides an average of 33% performance improvement for an 8-issue processor with no predicate support while full predication provides an additional 30% improvement.

UR - http://www.scopus.com/inward/record.url?scp=0029202471&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0029202471&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0029202471

SN - 0780330005

T3 - Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

SP - 138

EP - 149

BT - Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

ER -