Comparing FICDM and wafer-level CDM test methods: Apples to oranges?

Nathan Jack, Elyse Rosenbaum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The on-chip stresses induced by FICDM, WCDM2, CC-TLP, and VF-TLP are compared on the basis of voltage monitor readings and IC functional failures. In general, core circuit failures induced by FICDM are replicated on the wafer level. Package-related parasitics increase the FICDM current rise-time at an I/O pad relative to that measured externally, causing miscorrelation with wafer-level testers.

Original languageEnglish (US)
Title of host publicationElectrical Overstress/Electrostatic Discharge Symposium Proceedings 2012, EOS/ESD 2012
StatePublished - Nov 27 2012
Event34th International Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2012 - Tucson, AZ, United States
Duration: Sep 9 2012Sep 14 2012

Publication series

NameElectrical Overstress/Electrostatic Discharge Symposium Proceedings
ISSN (Print)0739-5159

Other

Other34th International Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2012
CountryUnited States
CityTucson, AZ
Period9/9/129/14/12

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Jack, N., & Rosenbaum, E. (2012). Comparing FICDM and wafer-level CDM test methods: Apples to oranges? In Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2012, EOS/ESD 2012 [6333309] (Electrical Overstress/Electrostatic Discharge Symposium Proceedings).