Comparative study of the thermal properties of hybrid integrated VCSEL arrays

Rui Pu, C. W. Wilmsen, Kent D Choquette, K. M. Geib

Research output: Contribution to journalArticle

Abstract

After successfully bonding VCSEL arrays to GaAs dummy chips and CMOS chips with three different bonding techniques, the thermal resistance and crosstalk of the bonded VCSEL arrays were measured. The thermal resistance of the VCSELs bonded to a GaAs substrate was found to be as low as 1100 K/W, indicating a high quality contact. Less than 100 K/W thermal crosstalk was also observed in the VCSEL arrays with a pitch of 250 μm. The thermal resistance of the VCSEL bonded to a CMOS chip with a standard bonding pad design has also been measured, which is 2490 K/W. The high thermal resistance is due to the dielectric layers underneath the bonding pads. A two-dimensional thermal transfer model was constructed to analyze the heat transfer of the bonded VCSELs. The model predicted a rapid increase of thermal resistance when the size of the solder bonding pads is less than 10 μm. The simulation also verified that the thermal resistance of the VCSEL bonded to a CMOS chip could be reduced by adding vias through the dielectric layers of the CMOS chip or increasing the thickness of the top gold traces.

Original languageEnglish (US)
Pages (from-to)87-97
Number of pages11
JournalProceedings of SPIE - The International Society for Optical Engineering
Volume3805
StatePublished - 1999
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Condensed Matter Physics

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