TY - JOUR
T1 - Compact modeling to device- and circuit-level evaluation of flexible TMD field-effect transistors
AU - Gholipour, Morteza
AU - Chen, Ying Yu
AU - Chen, Deming
N1 - Funding Information:
Manuscript received December 22, 2016; revised April 27, 2017; accepted June 22, 2017. Date of publication July 19, 2017; date of current version March 29, 2018. This work was supported in part by NSF under Grant CCF 07-46608 and in part by the grant of the Babol Noshirvani University of Technology. This paper was recommended by Associate Editor Y. Chen. (Corresponding author: Morteza Gholipour.) M. Gholipour is with the Department of Electrical and Computer Engineering, Babol Noshirvani University of Technology, Babol 47148-71167, Iran (e-mail: m.gholipour@nit.ac.ir). Y.-Y. Chen is with Synopsys Inc., Mountain View, CA 94043 USA.
Publisher Copyright:
© 2017 IEEE.
PY - 2018/4
Y1 - 2018/4
N2 - In this paper, a compact SPICE model of flexible transition metal dichalcogenide field-effect transistors (TMDFETs) is developed with considering effects when scaling the transistor size down to the 10-nm technology node. The model supports different transistor design parameters such as width, length, oxide thickness, and various channel materials, as well as the applied strain, which enables the evaluation of transistor- and circuit-level behavior under process variation and different levels of bending. Extensive device-level simulations are performed using this model, and TMDFETs are compared with different Si- and graphene-based devices. We performed circuit-level simulations, and reported the delay, power, and EDP of the benchmark circuits. Effects from process variation are also evaluated. These cross-technology studies show that TMDFET's power is comparable to the low-power multigate devices (about 0.4% lower). The delay and EDP are 60% and 2.3% higher than the graphene-based devices, respectively. The developed compact model would enable SPICE-level circuit simulation for early assessment, design, and evaluation of futuristic TMDFET-based flexible circuits targeting advanced technology nodes.
AB - In this paper, a compact SPICE model of flexible transition metal dichalcogenide field-effect transistors (TMDFETs) is developed with considering effects when scaling the transistor size down to the 10-nm technology node. The model supports different transistor design parameters such as width, length, oxide thickness, and various channel materials, as well as the applied strain, which enables the evaluation of transistor- and circuit-level behavior under process variation and different levels of bending. Extensive device-level simulations are performed using this model, and TMDFETs are compared with different Si- and graphene-based devices. We performed circuit-level simulations, and reported the delay, power, and EDP of the benchmark circuits. Effects from process variation are also evaluated. These cross-technology studies show that TMDFET's power is comparable to the low-power multigate devices (about 0.4% lower). The delay and EDP are 60% and 2.3% higher than the graphene-based devices, respectively. The developed compact model would enable SPICE-level circuit simulation for early assessment, design, and evaluation of futuristic TMDFET-based flexible circuits targeting advanced technology nodes.
KW - Circuit simulation
KW - Compact modeling
KW - Flexible electronics
KW - MoS
KW - Process variation
KW - Transition metal dichalcogenide field-effect transistor (TMDFET)
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U2 - 10.1109/TCAD.2017.2729460
DO - 10.1109/TCAD.2017.2729460
M3 - Article
AN - SCOPUS:85028885347
VL - 37
SP - 820
EP - 831
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SN - 0278-0070
IS - 4
M1 - 7984874
ER -