Compact modeling to device- and circuit-level evaluation of flexible TMD field-effect transistors

Morteza Gholipour, Ying Yu Chen, Deming Chen

Research output: Contribution to journalArticlepeer-review

Abstract

In this paper, a compact SPICE model of flexible transition metal dichalcogenide field-effect transistors (TMDFETs) is developed with considering effects when scaling the transistor size down to the 10-nm technology node. The model supports different transistor design parameters such as width, length, oxide thickness, and various channel materials, as well as the applied strain, which enables the evaluation of transistor- and circuit-level behavior under process variation and different levels of bending. Extensive device-level simulations are performed using this model, and TMDFETs are compared with different Si- and graphene-based devices. We performed circuit-level simulations, and reported the delay, power, and EDP of the benchmark circuits. Effects from process variation are also evaluated. These cross-technology studies show that TMDFET's power is comparable to the low-power multigate devices (about 0.4% lower). The delay and EDP are 60% and 2.3% higher than the graphene-based devices, respectively. The developed compact model would enable SPICE-level circuit simulation for early assessment, design, and evaluation of futuristic TMDFET-based flexible circuits targeting advanced technology nodes.

Original languageEnglish (US)
Article number7984874
Pages (from-to)820-831
Number of pages12
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume37
Issue number4
DOIs
StatePublished - Apr 2018

Keywords

  • Circuit simulation
  • Compact modeling
  • Flexible electronics
  • MoS
  • Process variation
  • Transition metal dichalcogenide field-effect transistor (TMDFET)

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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