@inproceedings{68ed0f528aa140348aef2f8ab0a6ef42,
title = "Compact modeling of vertical ESD protection NPN transistors for RF circuits",
abstract = "We present an easy-to-use, simulator-independent compact model of a vertical npn transistor suitable for ESD circuit simulation. In addition to including high-current and breakdown effects, we also model accurately the small-signal off-state impedance of the device using s-parameter measurements, for inclusion in RF circuit simulations. Experimental results are provided for silicon and SiGe npn transistors.",
keywords = "Circuit simulation, Computational modeling, Computer simulation, Electric breakdown, Electrostatic discharge, Hardware design languages, Impedance, Protection, Radio frequency, Virtual colonoscopy",
author = "Sopan Joshi and Elyse Rosenbaum",
note = "Funding Information: This work was funded by the Semiconductor Research Corporation, Research ID 955. R. Ida, Motorola, is thanked for providing test devices and donating the vector network analyzer. G. Kaatz, Motorola, is thanked for steering us in this research direction. S. Joshi gratefully acknowledges useful conversations with C.C. McAndrew, Motorola, and J. Li, UIUC. E. Rosenbaum thanks G. Groeseneken and H. Maes, IMEC, for providing her with facilities for the initial device characterization. The authors acknowledge T. Smedes, Philips, C. Russ, Sarnoff, and H. Gieser, Fraunhofer, for their mentoring of this paper. Publisher Copyright: {\textcopyright} 2002 ESDA.; 24th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2002 ; Conference date: 06-10-2002 Through 10-10-2002",
year = "2002",
language = "English (US)",
series = "Electrical Overstress/Electrostatic Discharge Symposium Proceedings",
publisher = "ESD Association",
pages = "292--298",
booktitle = "Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2002 - Proceedings",
}