TY - JOUR
T1 - Compact modeling of on-chip ESD protection devices using Verilog-A
AU - Li, Junjun
AU - Joshi, Sopan
AU - Barnes, Ryan
AU - Rosenbaum, Elyse
N1 - Manuscript received December 9, 2004; revised March 25, 2005. This work was supported by the Semiconductor Research Corporation. This paper was recommended by Associate Editor H. Kosma.
PY - 2006/6
Y1 - 2006/6
N2 - A practical approach for the compact modeling of electrostatic discharge (ESD) protection devices, using the behavioral language Verilog-A, is presented. Models of the NMOS transistor, the vertical n-p-n transistor, the diode, and the resistor have been developed, suitable for circuit-level simulation. Large-signal and small-signal models are provided for transient and alternating current (ac) simulation, respectively. A self-heating model is included for accurate simulation of the device ON-resistance under transient high-current conditions.
AB - A practical approach for the compact modeling of electrostatic discharge (ESD) protection devices, using the behavioral language Verilog-A, is presented. Models of the NMOS transistor, the vertical n-p-n transistor, the diode, and the resistor have been developed, suitable for circuit-level simulation. Large-signal and small-signal models are provided for transient and alternating current (ac) simulation, respectively. A self-heating model is included for accurate simulation of the device ON-resistance under transient high-current conditions.
KW - Electrostatic discharge (ESD)
KW - Metal-oxide-semiconductor (MOS) model
KW - Reliability
KW - Verilog-A
UR - http://www.scopus.com/inward/record.url?scp=33646741213&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33646741213&partnerID=8YFLogxK
U2 - 10.1109/tcad.2005.855948
DO - 10.1109/tcad.2005.855948
M3 - Article
AN - SCOPUS:33646741213
SN - 0278-0070
VL - 25
SP - 1047
EP - 1063
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IS - 6
ER -