Cohesion: A hybrid memory model for accelerators

John H. Kelm, Daniel R. Johnson, William Tuohy, Steven Sam Lumetta, Sanjay Jeram Patel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to manage coherence, found in compute accelerators. In some systems, both types of models are supported using disjoint address spaces and/or physical memories. In this paper we present Cohesion, a hybrid memory model that enables fine-grained temporal reassignment of data between hardware-managed and software-managed coherence domains, allowing a system to support both. Cohesion can be used to dynamically adapt to the sharing needs of both applications and runtimes. Cohesion requires neither copy operations nor multiple address spaces. Cohesion offers the benefits of reduced message traffic and on-die directory overhead when software-managed coherence can be used and the advantages of hardware coherence for cases in which software-managed coherence is impractical. We demonstrate our protocol using a hierarchical, cached 1024-core processor with a single address space that supports both software-enforced coherence and a directory-based hardware coherence protocol. Relative to an optimistic, hardware-coherent baseline, a realizable Cohesion design achieves competitive performance with a 2× reduction in message traffic, 2.1× reduction in directory utilization, and greater robustness to on-die directory capacity.

Original languageEnglish (US)
Title of host publicationISCA 2010 - The 37th Annual International Symposium on Computer Architecture, Conference Proceedings
Pages429-440
Number of pages12
DOIs
StatePublished - Aug 2 2010
Event37th International Symposium on Computer Architecture, ISCA 2010 - Saint-Malo, France
Duration: Jun 19 2010Jun 23 2010

Publication series

NameProceedings - International Symposium on Computer Architecture
ISSN (Print)1063-6897

Other

Other37th International Symposium on Computer Architecture, ISCA 2010
CountryFrance
CitySaint-Malo
Period6/19/106/23/10

Keywords

  • Accelerator
  • Cache coherence
  • Computer architecture

ASJC Scopus subject areas

  • Hardware and Architecture

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  • Cite this

    Kelm, J. H., Johnson, D. R., Tuohy, W., Lumetta, S. S., & Patel, S. J. (2010). Cohesion: A hybrid memory model for accelerators. In ISCA 2010 - The 37th Annual International Symposium on Computer Architecture, Conference Proceedings (pp. 429-440). (Proceedings - International Symposium on Computer Architecture). https://doi.org/10.1145/1815961.1816019