Closed form solution to simultaneous buffer insertion/sizing and wire sizing

C. Chu, D. F. Wong

Research output: Contribution to journalArticlepeer-review

Abstract

In this paper, we consider the delay minimization problem of an interconnect wire by simultaneously considering buffer insertion, buffer sizing and wire sizing. We consider three cases, namely using no buffer (i.e., wire sizing alone), using a given number of buffers, and using the optimal number of buffers. We provide elegant closed form optimal solutions for all three problems. These closed form solutions are useful in early stages of the VLSI design flow such as logic synthesis and floorplanning. General Terms: Design, Performance, Theory.

Original languageEnglish (US)
Pages (from-to)343-371
Number of pages29
JournalACM Transactions on Design Automation of Electronic Systems
Volume6
Issue number3
DOIs
StatePublished - Jan 1 2001
Externally publishedYes

Keywords

  • Buffer insertion
  • Buffer sizing
  • Closed form solution
  • Interconnect optimization
  • Wire sizing

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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