Abstract
We propose a heterostructure device comprised of magnets and piezoelectrics, which significantly improves the delay and the energy dissipation of an all-spin logic (ASL) device. This paper studies and models the physics of the device, illustrates its operation, and benchmarks its performance using SPICE simulations. We show that the proposed device maintains low-voltage operation, nonreciprocity, nonvolatility, cascadability, and thermal reliability of the original ASL device. Moreover, by utilizing the deterministic switching of a magnet from the saddle point of the energy profile, the device is more efficient in terms of energy and delay and is robust to thermal fluctuations. The results of simulations show that compared to ASL devices, the proposed device achieves 21\times shorter delay and 27\times lower energy dissipation per bit for a 32-bit arithmetic-logic unit.
Original language | English (US) |
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Pages (from-to) | 2040-2046 |
Number of pages | 7 |
Journal | IEEE Transactions on Electron Devices |
Volume | 65 |
Issue number | 5 |
DOIs | |
State | Published - May 2018 |
Externally published | Yes |
Keywords
- 32-Bit arithmetic-logic unit (ALU)
- All-spin logic (ASL)
- Interconnect
- Magnetostriction
- Magnets
- Piezoelectrics
- Spin-transfer torque (STT)
- Thermal noise
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering