Circuit-Level Simulation of TDDB Failure in Digital CMOS Circuits

Elyse Rosenbaum, Chenming Hu

Research output: Contribution to journalArticle

Abstract

An efficient circuit-level simulator for the prediction of time- dependent dielectric breakdown effects in digital CMOS circuits has been developed and integrated into the reliability simulation tool BERT (Berkeley Reliability Tools). The new module enhances the capability of the earlier SPICE-based oxide breakdown simulator by enabling practical simulations of large digital circuits. We discuss burn-in simulation for digital circuits and show that a significant reduction in oxide breakdown failure probability is possible.

Original languageEnglish (US)
Pages (from-to)370-374
Number of pages5
JournalIEEE Transactions on Semiconductor Manufacturing
Volume8
Issue number3
DOIs
StatePublished - Aug 1995

Fingerprint

Digital circuits
Oxides
CMOS
digital electronics
Simulators
breakdown
simulators
Networks (circuits)
SPICE
Electric breakdown
burn-in
oxides
simulation
modules
predictions

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

Cite this

Circuit-Level Simulation of TDDB Failure in Digital CMOS Circuits. / Rosenbaum, Elyse; Hu, Chenming.

In: IEEE Transactions on Semiconductor Manufacturing, Vol. 8, No. 3, 08.1995, p. 370-374.

Research output: Contribution to journalArticle

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