Circuit-level simulation of CDM-ESD and EOS in submicron MOS devices

Sridhar Ramaswamy, Erhong Li, Elyse Rosenbaum, Sung Mo Kang

Research output: Contribution to journalConference article

Abstract

In this paper, we present a compact electrothermal device model which can be used to simulate NMOS devices operating in the snapback regime. By incorporating temperature dependencies in the device model and using the electrothermal circuit simulator iETSIM, we are able to simulate the second breakdown of NMOS devices under EOS stress. The NMOS model also incorporates the finite breakdown time effect which is important for simulating charge device model (CDM) ESD stress events.

Original languageEnglish (US)
Pages (from-to)316-321
Number of pages6
JournalElectrical Overstress/Electrostatic Discharge Symposium Proceedings
StatePublished - Dec 1 1996
EventProceedings of the 1996 Electrical Overstress/Electrostatic Discharge Symposium - Orlando, FL, USA
Duration: Sep 10 1996Sep 12 1996

ASJC Scopus subject areas

  • Condensed Matter Physics

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