Circuit and Microarchitectural Techniques for Reducing Cache Leakage Power

Keyphrases

• Microarchitecture 100%
• Data Cache 100%
• Leakage Power 100%
• Cache Leakage 100%
• Instruction Cache 83%
• Caching 50%
• Cache Line 33%
• Leakage Energy 33%
• Prediction Method 16%
• Low Power 16%
• Low Leakage 16%
• Performance Loss 16%
• Complementary Metal Oxide Semiconductor 16%
• Control Strategy 16%
• Impact Performance 16%
• Semiconductor Process 16%
• Putting 16%
• Execution Time 16%
• Power Consumption 16%
• Microprocessor 16%
• Energy Consumed 16%
• Circuit Techniques 16%
• Total Energy Consumption 16%
• Efficient Execution 16%
• Fixed Period 16%
• Negative Performance 16%
• On-chip Cache 16%
• Drowsy Cache 16%
• Drowsy Mode 16%
• Prediction Policy 16%
• Moving Line 16%

Computer Science

• Instruction Cache 100%
• Power Consumption 40%
• Control Strategy 20%
• Complementary Metal Oxide Semiconductor 20%
• Execution Time 20%
• Performance Loss 20%
• Performance Impact 20%
• Efficient Execution 20%
• Prediction Technique 20%
• Dominant Component 20%