Chip-level ESD-induced noise on internally and externally regulated power supplies

Yang Xiu, Nicholas Thomson, Robert Mertens, Collin Reiman, Elyse Rosenbaum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Power integrity during system-level ESD is studied on two test chips that have different integrated voltage regulator designs. On-chip voltage regulation can provide increased immunity to ESD-induced noise, especially if the internally-generated power supply does not utilize any off-chip decoupling capacitors.

Original languageEnglish (US)
Title of host publicationElectrical Overstress/Electrostatic Discharge Symposium Proceedings 2017, EOS/ESD 2017
PublisherESD Association
ISBN (Electronic)1585372935
StatePublished - Oct 18 2017
Event39th Annual Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2017 - Tucson, United States
Duration: Sep 10 2017Sep 14 2017

Publication series

NameElectrical Overstress/Electrostatic Discharge Symposium Proceedings
ISSN (Print)0739-5159

Other

Other39th Annual Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2017
CountryUnited States
CityTucson
Period9/10/179/14/17

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Xiu, Y., Thomson, N., Mertens, R., Reiman, C., & Rosenbaum, E. (2017). Chip-level ESD-induced noise on internally and externally regulated power supplies. In Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2017, EOS/ESD 2017 (Electrical Overstress/Electrostatic Discharge Symposium Proceedings). ESD Association.