Abstract
In this paper, we present a chip-level electrothermal simulator, ILLIADS-T. It aims at finding the steady-state CMOS VLSI chip temperature profile and the corresponding circuit performance. With this tool, temperature-related reliability problems of VLSI chips can be accurately predicted to guide the module placement, packaging, as well as the timing verification.
Original language | English (US) |
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Pages (from-to) | 580-583 |
Number of pages | 4 |
Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
Volume | 4 |
State | Published - 1996 |
Event | Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA Duration: May 12 1996 → May 15 1996 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering