CHECKPOINT REPAIR FOR OUT-OF-ORDER EXECUTION MACHINES.

Wen-Mei W Hwu, Yale N. Patt

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The use of out-of-order execution and branch predictions in the design of supercomputers to increase performance means there must be some kind of repair mechanism, since situations do occur that require the computing engine to repair to a known previous state. One way to handle this is by checkpoint repair. Several properties of checkpoint repair mechanisms are derived, and algorithms for performing checkpoint repair that incur very little overhead in time and modest cost in hardware are provided. The algorithms require no additional complexity or time for use with write-back cache memory systems than they do with write-through cache memory systems.

Original languageEnglish (US)
Title of host publicationConference Proceedings - Annual Symposium on Computer Architecture
PublisherIEEE
Pages18-26
Number of pages9
ISBN (Print)0818607769
StatePublished - 1987
Externally publishedYes

Fingerprint

Repair
Cache memory
Supercomputers
Engines
Hardware
Costs

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Hwu, W-M. W., & Patt, Y. N. (1987). CHECKPOINT REPAIR FOR OUT-OF-ORDER EXECUTION MACHINES. In Conference Proceedings - Annual Symposium on Computer Architecture (pp. 18-26). IEEE.

CHECKPOINT REPAIR FOR OUT-OF-ORDER EXECUTION MACHINES. / Hwu, Wen-Mei W; Patt, Yale N.

Conference Proceedings - Annual Symposium on Computer Architecture. IEEE, 1987. p. 18-26.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hwu, W-MW & Patt, YN 1987, CHECKPOINT REPAIR FOR OUT-OF-ORDER EXECUTION MACHINES. in Conference Proceedings - Annual Symposium on Computer Architecture. IEEE, pp. 18-26.
Hwu W-MW, Patt YN. CHECKPOINT REPAIR FOR OUT-OF-ORDER EXECUTION MACHINES. In Conference Proceedings - Annual Symposium on Computer Architecture. IEEE. 1987. p. 18-26
Hwu, Wen-Mei W ; Patt, Yale N. / CHECKPOINT REPAIR FOR OUT-OF-ORDER EXECUTION MACHINES. Conference Proceedings - Annual Symposium on Computer Architecture. IEEE, 1987. pp. 18-26
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