CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture

Keyphrases

• Charm 100%
• Matrix multiplication 100%
• Heterogeneous Accelerators 100%
• Versal ACAP 100%
• Small Matrices 30%
• Computational Resources 20%
• Large Matrices 20%
• Xilinx 20%
• Deep Learning Applications 20%
• AI Engine 20%
• System Design 10%
• Analytical Model 10%
• Guide Design 10%
• Parallelizing 10%
• CPU Core 10%
• Evaluation Board 10%
• Many-core 10%
• Dense Matrix 10%
• Floating-point 10%
• Peak Performance 10%
• Accelerator Architectures 10%
• Automatically Generate 10%
• Heterogeneous Architectures 10%
• 32-bit 10%
• Core Logic 10%
• Machine Learning Models 10%
• Design Verification 10%
• Design Space Exploration 10%
• Throughput Gain 10%
• System Throughput 10%
• Programmable Logic 10%
• Massive Computations 10%
• Low-bandwidth Communication 10%
• FP32 10%
• Natural Language Processing Model 10%
• Throughput Bottlenecks 10%
• AI-ML 10%

Computer Science

• Matrix Multiply 100%
• Artificial Intelligence 30%
• Bidirectional Encoder Representations From Transformers 30%
• Machine Learning 20%
• Deep Learning 20%
• Natural Language Processing 10%
• Evaluation Board 10%
• Many-Core 10%
• Communication Bandwidth 10%
• Floating Point 10%
• Processing Model 10%
• Analytical Model 10%
• Peak Performance 10%
• Heterogeneous Architecture 10%
• Design-Space Exploration 10%
• Application Specific Integrated Circuit 10%
• End Application 10%
• Design Verification 10%
• Theoretical Peak 10%
• Programmable Logic 10%
• Working Architecture 10%