@inproceedings{a03c750116744be39fdc073f7b759c91,
title = "C-Mine: Data mining of logic common cases for low power synthesis of better-than-worst-case designs",
abstract = "The Better-Than-Worst-Case (BTW) design methodology is well-known for its potential to improve circuit energy efficiency, performance, and reliability. However, most existing methods do not provide sufficiently scalable solutions. Thus, we propose a new technique, C-Mine, which combines two scalable techniques, data mining and SAT solving, to provide scale-up solutions. Data mining can efficiently extract patterns from an enormous data set, and SAT solving is famous for its scalable verification. The experimental results show that, compared to a recent publication, C-Mine can achieve compatible performance with an additional 5% energy savings, and 50x speedup for bigger benchmarks on average.",
keywords = "Common case, Data Mining, Energy efficiency, Resynthesis, SAT solving, Scalability, Timing error resilience",
author = "Lin, {Chen Hsuan} and Lu Wan and Deming Chen",
year = "2014",
doi = "10.1145/2593069.2593107",
language = "English (US)",
isbn = "9781479930173",
series = "Proceedings - Design Automation Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "DAC 2014 - 51st Design Automation Conference, Conference Proceedings",
address = "United States",
note = "51st Annual Design Automation Conference, DAC 2014 ; Conference date: 02-06-2014 Through 05-06-2014",
}