BulkCompiler: High-performance sequential consistency through cooperative compiler and hardware support

W. Ahn, S. Qi, M. Nicolaides, J. Torrellas, J. W. Lee, X. Fang, S. Midkiff, David Wong

Research output: Contribution to journalConference articlepeer-review


A platform that supported Sequential Consistency (SC) for all codes - - not only the well-synchronized ones - - would simplify the task of programmers. Recently, several hardware architectures that support high-performance SC by committing groups of instructions at a time have been proposed. However, for a platform to support SC, it is insufficient that the hardware does; the compiler has to support SC as well. This paper presents the hardware-compiler interface, and the main compiler ideas for BulkCompiler, a simple compiler layer that works with the group-committing hardware to provide a whole-system high-performance SC platform. We introduce ISA primitives and software algorithms for BulkCompiler to drive instruction-group formation, and to transform code to exploit the groups. Our simulation results show that BulkCompiler not only enables a whole-system SC environment, but also one that actually outperforms a conventional platform that uses the more relaxed Java Memory Model by an average of 37%. The speedups come from code optimization inside software-assembled instruction groups.

Original languageEnglish (US)
Pages (from-to)133-144
Number of pages12
JournalProceedings of the Annual International Symposium on Microarchitecture, MICRO
StatePublished - 2009
Event42nd Annual IEEE/ACM International Symposium on Microarchitecture, Micro-42 - New York, NY, United States
Duration: Dec 12 2009Dec 16 2009


  • Atomic region
  • Chunk-based architecture
  • Compiler optimization
  • Sequential consistency

ASJC Scopus subject areas

  • Hardware and Architecture


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