Boosted Spin Channel Networks for Energy-Efficient Inference

Ameya D. Patil, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young, Naresh R. Shanbhag

Research output: Contribution to journalArticlepeer-review


Computational scaling beyond silicon electronics based on Moore's law requires the adoption of alternate state variables such as electronic spin. Multiple research efforts are underway exploring both Boolean and non-Boolean design space using spin devices in order to make their energy and delay benefits competitive to CMOS. In this paper, we propose spin channel networks (SCN), where the exponential decay property of spin current along the spin channel is exploited to achieve energy-efficient dot product implementation for inference applications. As the use of exponentially decaying spin current for analog computation enforces severe locality constraints, we employ adaptive boosting to design an ensemble of tiny SCNs that work in unison to solve any binary classification task. Such boosted SCNs achieve up to 112 × and × higher energy efficiency over conventional all-spin-logic-based and 20-nm CMOS designs, respectively.

Original languageEnglish (US)
Article number8631185
Pages (from-to)34-42
Number of pages9
JournalIEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Issue number1
StatePublished - Jun 2019
Externally publishedYes


  • Analog processing circuits
  • beyond-CMOS
  • boosting
  • machine learning
  • pattern analysis
  • spin transfer torque
  • spintronics

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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