Board-level multi-terminal net routing for FPGA-based logic emulation

Keyphrases

• Board Level 100%
• Multi-terminal 100%
• FPGA-based 100%
• Logic Emulation 100%
• Two-terminal 66%
• Emulation System 66%
• Network Flow 33%
• Optimal Algorithm 33%
• Decomposition Problem 33%
• Hypergraph 33%
• Bounded Degree 33%
• Spanning Tree 33%
• Routing Problem 33%
• Network Flow Algorithms 33%
• Hyperedge 33%
• Graph Transformation 33%
• Transformation Problem 33%
• Realizer 33%

Computer Science

• Field Programmable Gate Arrays 100%
• Optimal Algorithm 50%
• Spanning Tree 50%
• Routing Problem 50%
• Hyperedges 50%

Engineering

• Field Programmable Gate Arrays 100%
• Routing Problem 50%
• Spanning Tree 50%