Bit Serializing a Microprocessor for Ultra-low-power

Matthew Tomei, Henry Duwe, Nam Sung Kim, Rakesh Kumar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Many emerging sensor applications are powered by energy harvesters that impose strict power constraints. These applications often do not require high performance or energy efficiency. We explore a technique for minimizing power of a microprocessor for power constrained applications: bit serial computing. Bit serial computing promises power benefits up to the data width for fully bit serializable logic. We perform a best-effort bit serialization of the openMSP430 microprocessor without making instruction set architecture (ISA) modifications. Although it is very challenging to serialize much of the logic in the microprocessor, we show that power benefits of serialization exceed 42% when the serial and parallel designs synthesized for their maximum operating frequency are running at a low duty cycle. Benefits are expected to be higher when ISA modifications are allowed.

Original languageEnglish (US)
Title of host publicationISLPED 2016 - Proceedings of the 2016 International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages200-205
Number of pages6
ISBN (Electronic)9781450341851
DOIs
StatePublished - Aug 8 2016
Event21st IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2016 - San Francisco, United States
Duration: Aug 8 2016Aug 10 2016

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Other

Other21st IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2016
CountryUnited States
CitySan Francisco
Period8/8/168/10/16

Keywords

  • bit serial
  • ultra-low-power

ASJC Scopus subject areas

  • Engineering(all)

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