Better by a HAIR: Hardware-amenable internet routing

Firat Kiyak, Brent Mochizuki, Eric Keller, Matthew Caesar

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Routing protocols are implemented in the form of software running on a general-purpose microprocessor. However, conventional software-based router architectures face significant scaling challenges in the presence of ever-increasing routing table growth and churn. Recent advances in programmable hardware and high-level hardware description languages provide the opportunity to implement BGP directly at the hardware layer. Hardware-based implementation allows designs to take advantage of the parallelization and customizability of the underlying hardware to improve performance. As a first step in this direction, we design and implement a hardware-based BGP architecture. To understand the challenges in doing this, we propose an architecture and logical design for the core components of BGP running as a logical circuit in an FPGA. We then enumerate sources of complexity and performance bottlenecks, and derive modifications to BGP that reduce complexity of hardware offloading. Our results based on update traces from core Internet routers indicate an order of magnitude improvement in processing time and throughput.

Original languageEnglish (US)
Title of host publication17th IEEE International Conference on Network Protocols, ICNP '09
Number of pages10
StatePublished - 2009
Event17th IEEE International Conference on Network Protocols, ICNP '09 - Princeton, NJ, United States
Duration: Oct 13 2009Oct 16 2009

Publication series

NameProceedings - International Conference on Network Protocols, ICNP
ISSN (Print)1092-1648


Other17th IEEE International Conference on Network Protocols, ICNP '09
Country/TerritoryUnited States
CityPrinceton, NJ

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Software


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