TY - GEN
T1 - Bespoke processors for applications with ultra-low area and power constraints
AU - Cherupalli, Hari
AU - Duwe, Henry
AU - Ye, Weidong
AU - Kumar, Rakesh
AU - Sartori, John
N1 - Publisher Copyright:
© 2017 Association for Computing Machinery.
PY - 2017/6/24
Y1 - 2017/6/24
N2 - A large number of emerging applications such as implantables, wearables, printed electronics, and IoT have ultra-low area and power constraints. These applications rely on ultra-low-power general purpose microcontrollers and microprocessors, making them the most abundant type of processor produced and used today. While general purpose processors have several advantages, such as amortized development cost across many applications, they are significantly over-provisioned for many area-and power-constrained systems, which tend to run only one or a small number of applications over their lifetime. In this paper, we make a case for bespoke processor design, an automated approach that tailors a general purpose processor IP to a target application by removing all gates from the design that can never be used by the application. Since removed gates are never used by an application, bespoke processors can achieve significantly lower area and power than their general purpose counterparts without any performance degradation. Also, gate removal can expose additional timing slack that can be exploited to increase area and power savings or performance of a bespoke design. Bespoke processor design reduces area and power by 62% and 50%, on average, while exploiting exposed timing slack improves average power savings to 65%.
AB - A large number of emerging applications such as implantables, wearables, printed electronics, and IoT have ultra-low area and power constraints. These applications rely on ultra-low-power general purpose microcontrollers and microprocessors, making them the most abundant type of processor produced and used today. While general purpose processors have several advantages, such as amortized development cost across many applications, they are significantly over-provisioned for many area-and power-constrained systems, which tend to run only one or a small number of applications over their lifetime. In this paper, we make a case for bespoke processor design, an automated approach that tailors a general purpose processor IP to a target application by removing all gates from the design that can never be used by the application. Since removed gates are never used by an application, bespoke processors can achieve significantly lower area and power than their general purpose counterparts without any performance degradation. Also, gate removal can expose additional timing slack that can be exploited to increase area and power savings or performance of a bespoke design. Bespoke processor design reduces area and power by 62% and 50%, on average, while exploiting exposed timing slack improves average power savings to 65%.
KW - Application-specific processors
KW - Bespoke processors
KW - Hardware-software co-analysis
KW - Internet of Things
KW - Ultra-low-power processors
UR - http://www.scopus.com/inward/record.url?scp=85025598002&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85025598002&partnerID=8YFLogxK
U2 - 10.1145/3079856.3080247
DO - 10.1145/3079856.3080247
M3 - Conference contribution
AN - SCOPUS:85025598002
T3 - Proceedings - International Symposium on Computer Architecture
SP - 41
EP - 54
BT - ISCA 2017 - 44th Annual International Symposium on Computer Architecture - Conference Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 44th Annual International Symposium on Computer Architecture - ISCA 2017
Y2 - 24 June 2017 through 28 June 2017
ER -