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BDD-based circuit restructuring for reducing dynamic power
Quang Dinh
,
Deming Chen
,
Martin D.F. Wong
Electrical and Computer Engineering
Coordinated Science Lab
Information Trust Institute
Siebel School of Computing and Data Science
Research output
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Chapter in Book/Report/Conference proceeding
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Conference contribution
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Keyphrases
Area Overhead
25%
Clock Gating
50%
Constraint Matrix
25%
Control Signal
75%
Decomposition Algorithm
25%
Downscaling
25%
Dynamic Power
100%
Flip-flop
25%
ILP Formulation
25%
Linear Programming
25%
Low-power Design
25%
Pipeline Stages
50%
Power Saving
75%
Power Saving Mechanism
25%
Process Technology
25%
Selection Problem
25%
Totally Unimodular
25%
Transistor
25%
Computer Science
Control Signal
75%
Dynamic Power
100%
In-Process
25%
Linear Programming
25%
Low-Power Design
25%
Pipeline Stage
50%
Pipelining
25%
Problem Selection
25%
Engineering
Area Overhead
33%
Control Signal
100%
Design Power
33%
Flip Flop Circuits
33%
Linear Programming
33%
Optimal Set
33%