Automatic parallelization for non-cache coherent multiprocessors

Yunheung Paek; David A. Padua

doi:10.1007/BFb0017258

Automatic parallelization for non-cache coherent multiprocessors

Yunheung Paek
, David A. Padua

Siebel School of Computing and Data Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Although much work has been done on parallelizing compilers for cache coherent shared memory multiprocessors and message-passing multiprocessors, there is relatively little research on parallelizing compilers for non-cache coherent multiprocessors with global address space. In this paper, we present a preliminary study on automatic parallelization for the Cray T3D, a commercial scalable machine with a global memory space and noncoherent caches.

Original language	English (US)
Title of host publication	Languages and Compilers for Parallel Computing - 9th International Workshop, LCPC 1996, Proceedings
Editors	David Gelernter, David Sehr, Utpal Banerjee, Alex Nicolau, David Padua
Publisher	Springer
Pages	266-284
Number of pages	19
ISBN (Electronic)	9783540691280
ISBN (Print)	9783540630913
DOIs	https://doi.org/10.1007/BFb0017258
State	Published - 1997
Event	9th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1996 - San Jose, United States Duration: Aug 8 1996 → Aug 10 1996

Publication series

Name	Lecture Notes in Computer Science
Volume	1239
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Other

Other	9th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1996
Country/Territory	United States
City	San Jose
Period	8/8/96 → 8/10/96

ASJC Scopus subject areas

Theoretical Computer Science
General Computer Science

Online availability

10.1007/BFb0017258

Library availability

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Paek, Y., & Padua, D. A. (1997). Automatic parallelization for non-cache coherent multiprocessors. In D. Gelernter, D. Sehr, U. Banerjee, A. Nicolau, & D. Padua (Eds.), Languages and Compilers for Parallel Computing - 9th International Workshop, LCPC 1996, Proceedings (pp. 266-284). (Lecture Notes in Computer Science; Vol. 1239). Springer. https://doi.org/10.1007/BFb0017258

Automatic parallelization for non-cache coherent multiprocessors. / Paek, Yunheung; Padua, David A.
Languages and Compilers for Parallel Computing - 9th International Workshop, LCPC 1996, Proceedings. ed. / David Gelernter; David Sehr; Utpal Banerjee; Alex Nicolau; David Padua. Springer, 1997. p. 266-284 (Lecture Notes in Computer Science; Vol. 1239).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Paek, Y & Padua, DA 1997, Automatic parallelization for non-cache coherent multiprocessors. in D Gelernter, D Sehr, U Banerjee, A Nicolau & D Padua (eds), Languages and Compilers for Parallel Computing - 9th International Workshop, LCPC 1996, Proceedings. Lecture Notes in Computer Science, vol. 1239, Springer, pp. 266-284, 9th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1996, San Jose, United States, 8/8/96. https://doi.org/10.1007/BFb0017258

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Automatic parallelization for non-cache coherent multiprocessors

Abstract

Publication series

Other

ASJC Scopus subject areas

Online availability

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Languages and Compilers for Parallel Computing, 9th International Workshop, LCPC'96, San Jose, California, USA, August 8-10, 1996, Proceedings

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